Optimum performance, easy installation and energy efficiency are some attributes of offered range. We also offer these products in various models and sizes as per the specifications provided by the customers. In addition to this, owing to our vast and thorough expertise, we have been able to undertake bulk orders for AD 03 Remote Control Integrated Circuits from our customers and deliver these within the given time frame. Additionally,it provides one frequency programmable and duty selectable Pulse Width Modulation PWM output for remote control. And it provides a build-in capture mode timer for input signal frequency detecting by Infrared learning function.
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CPU Introduction CPU Register Memory Space Configuration Register Interrupt Register Port B Port D Generalplus Technology Inc. Additionally, it provides one frequency programmable and duty selectable Pulse Width Modulation PWM output for remote control. And it provides a built-in capture mode timer for input signal frequency detecting by infrared learning function. It operates over a wide voltage range of 2. It pin with input with pull low or high resistor and output low multifunction.
Timer mode with clock source selectable? PWM output in carrier signal mode with duty and driver current programmable? PWM output in no carrier signal mode with driver current programmable? Capture the input signal frequency? Detect the signal envelop has a SLEEP mode for power saving which retains the contents of RAM, but stops the oscillator and causes all other chip functions to be inoperative.
SLEEP mode can be released by using external wakeup sources. Meanwhile, the built-in IR transfer module can make IR control and usage easily. Up to 8MHz clock operation Memories?
Enhanced reset system? Frequency: 0. Built-in IR RX can supply capture function with sensitivity adjustable. Normal wakeup source, if key is changed, chip wakeup from sleep mode. Key scan wakeup source, if key change is detected, chip wakeup from sleep mode. Key scan wakeup source, if key change is detected, chip wakes up from sleep mode. Crystal Input: It will be connected with external crystal for a crystal oscillation circuitry in crystal mode.
Crystal Output: It is connected with external crystal for a crystal oscillation circuitry in crystal mode. The power supply for SRAM block. Central Processing Unit 5. CPU Introduction The microprocessors of GPM6PA is a high performance processor equipped with six internal registers: accumulator, program counter, X register, Y register, stack pointer, and processor status register.
When subroutine call is executed or an interrupt occurrence is accepted, the value of stack point is updated automatically. The oscillation frequency could be varied up to 8. Stack Pointer The CPU has an 8-bit-wide register indicating the location in the stack to be accessed push or pop when a subroutine call or interrupt occurs. Fixed value by hardware 5.
This register indicates the address of next instruction to be executed. Status Register P The 8-bit status register contains the interrupt mask and 6 flags representative of the result of the instruction just executed. These bits can be individually controlled by specific instructions. Figure System registers The detailed description is shown in following description.
Note: Not all instructions affect status register. A detailed instruction description will be discussed in instruction manual.
Negative flag bit This flag indicates the bit7 status of the result of a data or arithmetic operation. Programmer can use this bit to do some operations, e. These register contents are added to the Some specified address, which becomes the actual address.
Overflow flag bit This flag indicates whether the overflow has occurred in arithmetic operation. The CPU has two operation modes; binary mode and decimal mode for arithmetic operation. Carry flag Interrupt disable flag This bit can enable or disable all interrupt except NMI interrupt source.
In addition, some shift instructions or rotate instructions also change this bit. Programmer can use the Zero flag This flag indicates the result of a data or arithmetic operation.
Contrary, this Figure Status register? Memory Organization 5. Program memory can be read only. It contains up to 8K bytes of program memory. Data memory that contains bytes of RAM including stack area can be read and written. Configuration Register The configuration register is used to setup the operation condition.
Crystal resonator or internal oscillator clock source option. LVR enable or disable option. Watchdog enable or disable option. Its RAM consists of bytes including Stack. The exception vectors should be specified in the program to have proper operation. All of the control are not implemented on the chip. Some of bits in control register are read only.
When writing to them, there are no any effects on the corresponding bits. The following table shows the summary of the control registers. The detailed information of each control registers are explained in each peripheral section.
Some of the control registers contain control and status bits for peripheral module such as Timer unit, Interrupt control unit, etc. The detailed configuration register setting of device has been given in Section 5. Figure Two types of clock sources 5. Power Saving Mode 5. These two modes are able to reduce power consumption and save power. They also feature different wakeup time.
T-Type Key. See Figure Interrupt 5. Introduction GPM6PA provides eight types of interrupt sources with the same normal interrupt level. These interrupts have individual status occurred or not and control enable or not registers. In a corresponding way, the system abstract the return PC address from the bottom of the stack when finished the interrupt service See Figure These interrupt sources are listed as [Table] and will be described in corresponding section.
With any instruction, interrupts pending during the previous instruction is served. If the related interrupt control bit is set to enable interrupt, an interrupt request signal will be generated and then CPU executes the interrupt service routine.
If the related interrupt control bit is disabled, The interrupt flag bits programmer still can observe the corresponding flag bit, but no interrupt request signal will be generated.
Reset Sources 5. These reset sources can be concluded as external events and internal events. The internal events come from the program run away. Figure shows the affected region for Figure Reset sources 5. After that, the system will operate in target speed and start to activate. If this function is enabled, the LVR circuit will monitor power level while chip is operating. This function prevents MCU from working at an invalid operating voltage range. This function prevents the MCU from being stuck in an abnormal condition.
These port pins may be multiplexed with an alternate function for the peripheral features on the device. In general, when an initial reset state occurs, all ports are used as a general purpose input There are three parts, data, direction and attribution Each corresponding bit in these The setting rules are as follows: The direction setting determines whether this pin is an input or an output.
The data register is used to read the value on the port, which In M-Type keyboard application, Port B should be configured as input ports, and in sleep mode any change occurred in these ports will cause system wakeup. Any of the keys touch would cause system wakeup. Port B Port B is a 6-bit programmable bi-directional port. Port D Port D is a 6-bit programmable bi-directional port. Timer Module 5. Timer A contains one powerful PWM function function can be easily configured. Timer A also has a capture function which can capture the frequency of input signal.
And Timer A has another function is envelope detection; it can detect envelope waveform of input signal with or without carrier signal.
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